Microelectronic devices generally have a die (i.e., a chip) that includes integrated circuitry having a high density of very small components. In a typical process, a large number of dies are manufactured on a single wafer using many different processes that may be repeated at various stages (e.g., implanting, doping, photolithography, chemical vapor deposition, plasma vapor deposition, plating, planarizing, etching, etc.). The dies typically include an array of very small bond-pads electrically coupled to the integrated circuitry. The bond-pads are the external electrical contacts on the die through which the supply voltage, signals, etc., are transmitted to and from the integrated circuitry. The dies are then separated from one another (i.e., singulated) by dicing the wafer and backgrinding the individual dies. After the dies have been singulated, they are typically xe2x80x9cpackagedxe2x80x9d to couple the bond-pads to a larger array of electrical terminals that can be more easily coupled to the various power supply lines, signal lines and ground lines.
The individual dies can be packaged by electrically coupling the bond-pads on the die to arrays of pins, ball-pads, or other types of electrical terminals, and then encapsulating the die to protect it from environmental factors (e.g., moisture, particulates, static electricity and physical impact). In one application, the bond-pads are coupled to leads of a lead frame, and then the die and a portion of the lead frame is encapsulated in a protective plastic or other material. In other applications for packing high density components in smaller spaces, the bond-pads are electrically connected to contacts on a thin substrate that has an array of ball-pads. For example, one such application known as xe2x80x9cflip-chipxe2x80x9d packaging involves placing the active side of the die having the bond-pads downward against the contacts on a ball-grid array substrate, reflowing solder between the contacts and the bond-pads, and then molding an encapsulant around the die without covering the ball-pads on the ball-grid array. Other types of packing that use ball-grid arrays include xe2x80x9cchip-on-board,xe2x80x9d xe2x80x9cboard-on-chip,xe2x80x9d and xe2x80x9cflex-on-chipxe2x80x9d devices. These types of devices are generally known as Ball-Grid-Array (BGA) packages.
Many electrical products require packaged microelectronic devices to have an extremely high density of components in a very limited amount of space. The space available for memory devices, processors, displays and other microelectronic components is quite limited in cell phones, PDAs, portable computers and many other products. As such, there is a strong drive to reduce the surface area or xe2x80x9cfootprintxe2x80x9d that the device needs on a printed circuit board and the height of packaged microelectronic devices. This is becoming difficult because high performance devices generally have more bond-pads, which result in larger ball-grid arrays and thus larger footprints. Thus, there is a strong need to reduce the size of BGA packaged devices.
One concern of packaging BGA devices is that a significant amount of space is required between the die and the ball-pads on the support for clamping a mold to the support. Additionally, the ball-pads must be spaced apart from the die so that the molding compound or glob-top material does not foul the ball-pads. The distance between the die and the ball-pad array for accommodating the mold increases the footprint of the packaged device, which accordingly occupies more real estate on a printed circuit board. As a result, it may not be possible or practical to have a full array of ball-pads on a substrate because the footprint of such a substrate may be too large for use in certain types of devices (cellular phones, PDAs, and other compact products). Therefore, even though flip-chip, board-on-chip, chip-on-board, flex-on-chip and other types of BGA packaging have significant advantages over conventional lead frame packaging, even BGA packages may not be sufficiently small for the demanding requirements of many popular products.
One technique used to increase the density of microelectronic devices within a footprint on a printed circuit board is to stack one microelectronic die on top of another. It will be appreciated that stacking the dies increases the density of microelectronic devices within a given surface area on the printed circuit board. The microelectronic dies are typically connected to each other with an adhesive wire that is heat cured to form a secure bond between the dies. Stacking the dies, however, presents many challenges that are not applicable to single-die packages. For example, the upper die is typically smaller than the lower die, which limits the types of dies that can be stacked together and generally requires different dies in a single stack. For example, when two different dies are stacked on each other (e.g., a flash-memory device stacked on an SRAM device), the stacked-die assembly requires multiple test sockets, different testing devices, and multiple test programs to test the individual types of dies. This requires manufacturers to have different test sockets and test programs for each of the different types of dies, which is expensive because of the significant capital expenditure for the test equipment and the high labor costs for the skilled labor to perform the individual tests.
Another drawback of many techniques for stacking dies in which the dies are wire-bonded to the substrate is that the routing for the wire-bonds from the dies to the circuit board is complex. Typical stacked-die assemblies connect the terminals on the dies to the printed circuit board or another type of interposer substrate using wire-bonded connections. It is complex to form the wire-bond connections on a conventional stacked assembly because the contacts from both of the dies must be routed to correct locations on the interposer substrate. The available space on the interposer substrates, however, is generally a very small area that cannot accommodate the wire-bonding of both dies. It will be appreciated that wire-bonding stacked dies to a single interposer substrate is also expensive and may not produce robust connections.
Still another drawback of conventional stacked-die assemblies is that it is difficult to stack one two-die assembly to another single or multiple-die assembly. In conventional stacked-die assemblies, each die has a separate assembly of ball-pads for coupling each die to an interposer substrate. As such, conventional stacked-die assemblies do not allow more than two dies to be stacked together in a single assembly. It is accordingly difficult to increase the capacity (e.g., the memory capacity of like memory devices) or the functional performance (e.g., combining a flash-memory device and an SRAM device) beyond the two-die stacked-die assemblies that are currently the state of the art.
The present invention is directed toward packaged microelectronic devices, interface substrates for packaging microelectronic devices, and methods of packaging single-die or stacked-die microelectronic devices. In an aspect of one embodiment related to stacked-die packages, a microelectronic device can include a first die, a second die juxtaposed to the first die, and an interface substrate coupled to the first and second dies. The first die can have a first integrated circuit and a first terminal array coupled to the first integrated circuit, and the second die can have a second integrated circuit and a second terminal array coupled to the second integrated circuit. The interface substrate can comprise a body, a first contact array on the body that is electrically coupled to the first terminal array of the first die, a second contact array on the body that is electrically coupled to the second terminal array of the second die, and at least one ball-pad array on the body. The interface substrate can also include interconnecting circuitry electrically coupling at least a portion of the first and second contact arrays with at least a portion of the first ball-pad array.
In an aspect of another embodiment that is related to single-die or stacked-die packages, a microelectronic device comprises a microelectronic die and an interface substrate or redistribution member. The die can include an interior surface, an integrated circuit, and a plurality of bond-pads arranged in a first terminal array at the interior surface. The bond-pads are coupled to the integrated circuit. The interface substrate can include a first section or die section attached to the interior surface of the die, an intermediate section extending at an angle from the first section, and a second section or array section extending from the intermediate section. The array section is spaced across from the die section. For example, the die section of the interface substrate can be attached to an active surface of the microelectronic die, and the array section of the interface substrate can be attached to either the backside of the die, a casing that covers the backside of the die, or a casing that covers the first terminal array on the die. As such, even though the array section is spaced across from the die section, the space between the array and die sections of the interface substrate can be occupied by the die and/or the casing. The interface substrate can further comprise a plurality of first contacts arranged in a first contact array on the die section, a plurality of ball-pads on the array section that are arranged in an exposed ball-pad array, and interconnecting circuitry. The first contacts are electrically coupled to the bond-pads on the die, and the interconnecting circuitry is electrically coupled to the ball-pads and the first contacts.
Another embodiment of the invention is directed toward a microelectronic device comprising a microelectronic die, a casing encapsulating at least a portion of the die, and a redistribution member coupled to the die and the casing. The die includes an active side, a plurality of bond-pads carried on the active side, an integrated circuit coupled to at least a number of the bond-pads, and an inactive side or backside. The casing can encapsulate only a portion of the die, such as the bond-pads on the active side, or it can encapsulate the entire die. The casing can have a side surface generally along the side of the die and an exterior face.
The redistribution member can include a die section between the active side of the die and at least a portion of the casing, an array section attached to the inactive side of the die and/or the exterior face of the casing, and an interconnecting section extending along at least a portion of the side surface of the casing between the die section and the array section. In one particular embodiment, the die section is aligned with the array section such that either the die and/or the casing is between the die section and the array section. The redistribution member can further include a plurality of first contacts arranged in a contact array on the die section and electrically coupled to corresponding bond-pads on the die, and a plurality of ball-pads arranged in an exposed ball-pad array on the array section and electrically coupled to the first contacts via the interconnecting section.